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low noise, low input bias current, rail - to - rail outp ut, jfet dual operational amplifier data sheet ada4001 - 2 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. features low t c v os : 5 v/c typical low input bias current: 20 pa typical at v s y = 15 v low noise 7. 7 nv/hz typical at f = 1 khz 1 . 2 v rms at 20 hz to 2 0 k hz low distortion: 0.000 0 6 % no phase reversal rail - to - r ail o utput unity - gain stable applications instrumentation medical instruments multipole filters precision current measurement photodiode amplifiers sensors audio pin configuration 10375-002 out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ADA4001-2 t op view (not to scale) figure 1. 8 - lead soic_n (r suffix) general description the ada4001 - 2 is a dual channel jfet amplifier that features low input voltage noise and current noise, input bias current, and rail - to - rail output . the combination of low noise and lo w input bias current makes this amplifier especially sui table for high impedance sensor amplification. with low noise and fast settling times , the ada4001 - 2 provides good accuracy for medical instruments, electronic measurement, and automated test equipment. unlike many competitive amplifiers, the ada4001 - 2 maintains fast settling performance even with substantial capacitive loads , and , unlike many older jfet amplifiers, the ada4001 - 2 does not suffer from output phase reversal when input voltages exceed the maximum common - mode voltage range. with fast slew rate and great stability under capacitive loads , the ada4001 - 2 is a go od fit for filter applications . with low input bias currents and noise , it offers a wide dynamic range for photodi - ode amplifier circuits. low noise and distortion , along with high output current and excellent speed , make the ada4001 - 2 a great choice for audio applications. the ada4001 - 2 is specified over the ?40c to +125c extended industrial temperature range. the ada4001 - 2 is available in an 8 - lead narrow soic package.
ada4001- 2 data sheet rev. b | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 pin configuration ............................................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics ............................................................. 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 typical performance characteristics ..............................................5 applications information .............................................................. 10 total noise including source resistors ................................... 10 i - v conversion applications .................................................... 10 input bias current ...................................................................... 11 noise considerations ................................................................. 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 revision history 5/12 rev. a to rev b changes to general description section ...................................... 1 changed input impedance to in put capacitance throughout .. 3 added input resistance parameter, table 1 .................................. 3 change to figure 5 caption ............................................................ 5 2/12 rev. 0 to rev. a changes to figure 27 ........................................................................ 9 2 / 1 2 rev ision 0 : initial version
data sheet ada4001- 2 rev. b | page 3 of 12 specifications electrical character istics v s y = 15 v, v cm = 0 v, t a = 2 5c, unless otherwise noted. table 1 . parameter symbol test conditions /comments min typ max unit input characteristics offset voltage v os 0.5 1.5 mv ? 40c < t a < +12 5c 2.5 mv offset voltage drift v os /t 5 v/c input bias current i b 20 30 pa ? 40c < t a < +125c 4 na input offset current i os 20 pa ? 40c < t a < +125c 2 na input voltage range ? 12.5 +12.5 v common - mode rejection ratio cmrr v cm = ?1 2 . 5 v to +12.5 v 9 6 105 d b ? 40c < t a < +12 5c 9 0 db large signal voltage gain a vo r l = 10 k?, v o = ? 1 3 . 5 v to +13 .5 v 104 1 1 2 db r l = 2 k?, v o = ? 13.5 v to +13.5 v 104 1 1 2 db ? 40c < t a < +125c 90 db r l = 600 ?, v o = ?13.0 v to +13.0 v 90 93 db input capac itance , differential c dm v cm = 0 v 3.1 pf input capacitance , common - mode c cm v cm = 0 v 4.8 pf input resistance v cm = 0 v >1 10 13 ? output characteristics output voltage high v oh r l = 10 k? 14.8 v r l = 2 k? 14.5 v r l = 600 ? 13.5 v output voltage low v ol r l = 10 k? ?14.8 v r l = 2 k? ?14.5 v r l = 600 ? ?13.5 v short - circuit current i sc 5 0 ma power supply power supply rejection ratio psrr v s = 4.5 v to 18 v 96 110 db ? 40c < t a < +125c 93 db operating voltage range 5 18 v supply current/amplifier i sy v o = 0 v 2 3 ma 4 ma dynamic performance slew rate sr r l = 2 k? 15 1 25 v/s gain bandwidth product gbp v in = 5 mv p - p, r l = 10 k?, a v = 100 16.7 mhz unity - gain crossover ugc v in = 5 mv p - p, r l = 10 k?, a v = 1 10.2 mhz phase margin m 76 degrees ?3 db closed - loop bandwidth ?3 db a v = 1, v in = 5 mv p -p 10. 3 mhz settling time t s to 0. 0 1%, 10 v step, g = +1 1.2 s total harmonic dis tortion (thd) + noise thd + n 1 khz, g = +1, r l = 2 k? 0.0000 6 % noise performance voltage noise e n rms 20 hz to 20 khz 1.2 v rms voltage noise density e n f = 100 hz 8. 8 nv/hz f = 1 khz 7. 7 nv/hz current noise density i n f = 1 khz 3 fa/hz 1 guaranteed by design and charact erization .
ada4001- 2 data sheet rev. b | page 4 of 12 absolute maximum rat ings table 2 . parameter rating supply voltage 18 v input voltage v s y output short - circuit duration to gnd observe derating curves storage temperature range ? 65c to +150c opera ting temperature range ? 40c to +125c junction temperature range ? 65c to +150c lead temperature (soldering, 10 sec) 300c electrostatic discharge (h uman b ody m odel ) 3 0 00 v stresses above those listed under absolute maximum ratings may cause per manent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating condit ions for extended periods may affect device reliability. thermal resistance table 3 . package type ja 1 jc unit 8 - lead soic_n (r -8 ) 1 3 0 4 5 c/w 1 ja is specified for worst - case conditions, that is, ja is specified for a device soldered in a circuit board for surface - mount packages. esd caution
data sheet ada4001- 2 rev. b | page 5 of 12 typical performance characteristics t a = 25c, unless otherwise noted. 140 160 180 200 120 100 80 60 40 20 0 ?800 ?700 ?600 ?500 ?400 ?300 ?200 ?100 0 100 200 300 400 500 600 700 800 offset voltage (v) number of channels 10375-003 ADA4001-2 soic v sy = 15v t a = 25c figure 2 . input offset voltage distribution 140 120 100 80 60 40 20 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 t c v os (v/c) ADA4001-2 v sy = 15v t a = ?40c to +125c number of amplifiers 10375-004 figure 3. t c v os distribution 300 200 100 0 ?100 ?200 ?300 ?15 ?10 ?5 0 5 10 15 common-mode input voltage (v) input offset voltage (v) 10375-005 ADA4001-2 v sy = 15v t a = ?40c to +125c unit 3 unit 2 unit 1 figure 4 . input offset voltage vs. common - mode voltage 15 10 5 0 ?5 ?10 ?15 ?15 ?10 ?5 0 5 10 15 common-mode input voltage (v) input bias current (pa) 10375-006 ADA4001-2 soic v sy = 15v t a = 25c r l = three units figur e 5 . input bias current vs. common - mode voltage 100 75 50 25 0 ?25 ?50 ?15 ?10 ?5 +85c +125c ?40c 0 5 10 15 common-mode input voltage (v) input bias current (pa) 10375-007 ADA4001-2 soic v sy = 15v r l = +25c figure 6 . input bias current vs. v cm and temperature 10 1 0.1 0.01 0.1 1 10 100 i out source (ma) v dd ? v out (v) 10375-008 ADA4001-2 v sy = 15v t a = 25c figure 7 . dropout voltage vs. source current
ada4001- 2 data sheet rev. b | page 6 of 12 10 1 0.1 0.01 0.1 0.01 1 10 100 i out sink (ma) v out ? v ss (v) 10375-009 ADA4001-2 v sy = 15v t a = 25c figure 8 . dropout voltage vs. sink current 120 270 225 180 135 90 45 0 ?45 ?90 100 80 60 40 20 0 ?20 ?40 0.01 0.1 1 10 100 1k 10k 100k frequency (khz) gain (db) phase (degrees) 10375-012 ADA4001-2 v sy = 15v t a = 25c r l = 2k? figure 9 . open - loop gain and phase vs. frequency 50 30 10 ?10 ?30 1 10 100 1k 10k 100k frequency (khz) gain (db) 10375-013 ADA4001-2 v sy = 15v t a = 25c r l = 2k? a v = +100 a v = +10 a v = +1 figure 10 . closed - loop gain vs. frequency 1k 100 10 1 0.1 0.01 1 0.1 10 100 1k 10k 100k frequency (khz) z out (?) 10375-014 ADA4001-2 v sy = 15v t a = 25c a v = +100 a v = +10 a v = +1 figure 11 . closed - loop output imp edance vs. frequency 120 100 80 60 40 20 0 ?20 1 0.1 10 100 1k 10k frequency (khz) psrr (db) 10375-015 psrr? psrr+ ADA4001-2 v sy = 15v t a = 25c figure 12 . psrr vs. frequency 120 140 100 80 60 40 20 0 1 0.1 10 100 1k 10k frequency (khz) cmrr (db) 10375-016 ADA4001-2 v sy = 15v t a = 25c figure 13 . cmrr vs. frequency
data sheet ada4001- 2 rev. b | page 7 of 12 12 0.1% 0.01% 10 8 6 4 2 0 0 0.2 0.4 0.6 0.8 1.0 1.2 settling time (s) step size (v) 10375-029 ADA4001-2 v sy = 15v t a = 25c figure 14 . settling time positive step 12 8 10 4 6 0 2 ?4 ?2 ?8 ?6 ?12 ?10 0 2 4 6 8 1 3 5 7 9 10 time (s) volts (v) 10375-030 ADA4001-2 v sy = 15v t a = 25c a v = +1 r l = 2k? c l = 100pf figure 15 . large sig nal transient response 75 50 25 0 ?25 ?50 ?75 0 2 4 6 8 10 time (s) voltage (mv) 10375-017 ADA4001-2 v sy = 15v t a = 25c a v = +1 r l = 2k? c l = 100pf figure 16 . small signal transient response 12 0.1% 0.01% 10 8 6 4 2 0 0 0.2 0.4 0.6 0.8 1.0 1.2 settling time (s) step size (v) 10375-018 ADA4001-2 v sy = 15v t a = 25c figure 17 . settling time negative step 100 10 1 0.001 0.01 0.1 1 10 100 frequency (khz) voltage noise density (nv/ hz) 10375-021 ADA4001-2 v sy = 15v t a = 25c figure 18 . voltage noise density 40 45 50 35 30 0 25 20 15 10 5 0.01 0.1 1 capacitance (nf) overshoot (%) 10375-022 os? os+ ADA4001-2 v sy = 15v t a = 25c a v = +1 figure 19 . overshoot vs. load capacitance
ada4001- 2 data sheet rev. b | page 8 of 12 ?40 ?60 ?100 ?80 ?120 ?140 ?160 0.01 0.1 1 10 100 frequency (khz) channel separation (db) 10375-031 ADA4001-2 v sy = 15v t a = 25c r l = 2k? figure 20 . channel separation 1 0.1 0.01 0.001 0.0001 0.00001 0.1 0.01 0.001 1 10 amplitude (v rms) thd + n (%) 10375-024 ADA4001-2 v sy = 15v f in = 1khz t a = 25c r l = 2k? figure 21 . thd + n vs. amplitude 0.01 0.001 0.0001 0.00001 1 0.1 0.01 10 100 frequency (khz) thd + n (%) 10375-025 ADA4001-2 v sy = 15v t a = 25c r l = 2k? 500khz filter 80khz filter figure 22 . thd + n vs. frequency 20 15 10 5 0 ?5 ?10 ?15 ?20 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 time (ms) volts (v) 10375-026 ADA4001-2 v sy = 15v t a = 25c a v = +1 r l = 2k? c l = 100pf output input figure 23 . no phase reversal 12 8 10 4 6 0 2 ?4 ?2 ?8 ?6 ?12 ?10 0 0.4 0.8 1.2 1.6 0.2 0.6 1.0 1.4 1.8 2.0 time (s) volts (v) 10375-032 ADA4001-2 v sy = 15v t a = 25c a v = +1 r l = 2k? c l = 100pf figure 24 . positive slew rate 12 8 10 4 6 0 2 ?4 ?2 ?8 ?6 ?12 ?10 0 0.4 0.8 1.2 1.6 0.2 0.6 1.0 1.4 1.8 2.0 time (s) volts (v) 10375-033 ADA4001-2 v sy = 15v t a = 25c a v = +1 r l = 2k? c l = 100pf figure 25 . negative slew rate
data sheet ada4001- 2 rev. b | page 9 of 12 300 200 100 0 ?100 ?200 ?300 0 1 2 3 4 5 6 7 8 9 10 time (sec) voltage (nv) 10375-027 ADA4001-2 v sy = 15v t a = 25c figure 26 . peak - to - peak voltage noise 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 2 4 6 8 10 12 14 16 18 v sy (v) i sy for both amplifiers (ma) 10375-028 ADA4001-2 no load a v = +1 v cm = 0v +125c +85c +25c ?40c figure 27 . supply current vs. supply voltage and temperature
ADA4001-2 data sheet rev. b | page 10 of 12 applications information total noise including source resistors the low input current noise and input bias current of the ADA4001-2 makes it the ideal amplifier for circuits with substantial input source resistance. input offset voltage increases by less than 15 nv per 500 of source resistance at room temperature. the total noise density of the circuit is ?? s s nn ntotal ktr riee 4 2 2 ??? where: e n is the input voltage noise density of the part. i n is the input current noise density of the part. r s is the source resistance at the noninverting terminal. k is boltzmanns constant (1.38 10 C23 j/k). t is the ambient temperature in kelvin (t = 273 + c). for r s < 4 k, e n dominates and e ntotal e n . the current noise of the ADA4001-2 is so low that its total density does not become a significant term unless r s is greater than 100 m, an impractical value for most applications. the total equivalent rms noise over a specific bandwidth is expressed as bw ee ntotal ntotal ? where bw is the bandwidth in hertz. note that the previous analysis is valid for frequencies larger than 150 hz and assumes flat noise above 10 khz. for lower frequencies, flicker noise (1/f) must be considered. i-v conversion applications photodiode circuits common applications for i-v conversion include photodiode circuits where the amplifier is used to convert a current emitted by a diode placed at the positive input terminal into an output voltage. the ADA4001-2 low input bias current, wide bandwidth, and low noise makes it an excellent choice for various photodiode applications, including fax machines, fiber optic controls, motion sensors, and bar code readers. the circuit shown in figure 28 uses a silicon diode with zero bias voltage. this is known as a photovoltaic mode; this configuration limits the overall noise and is suitable for instrumentation applications. 4 8 3 1 2 ADA4001-2 cf r2 rd ct v ee v cc 10375-034 figure 28. equivalent preamplifier photodiode circuit a larger signal bandwidth can be attained at the expense of additional output noise. the total input capacitance (ct) consists of the sum of the diode capacitance and the amplifiers input capacitance (8 pf), which includes external parasitic capacitance. ct creates a pole in the frequency response that can lead to an unstable system. to ensure stability and optimize the bandwidth of the signal, a capacitor is placed in the feedback loop of the circuit shown in figure 28. it creates a zero and yields a bandwidth whose corner frequency is 1/(2(r2cf)). the value of r2 can be determined by the ratio v / i d where: v is the desired output voltage of the op amp. i d is the diode current. for example, if i d is 100 a and a 10 v output voltage is desired, r2 should be 100 k. rd (see figure 28) is a junction resistance that drops typically by a factor of 2 for every 10c increase in temperature. a typical value for rd is 1000 m. because rd >> r2, the circuit behavior is not impacted by the effect of the junction resistance. the maximum signal bandwidth is ctr ft f max 22 ? ? where ft is the unity gain frequency of the amplifier. cf can be calculated by ftr ct cf 22 ? ? where ft is the unity gain frequency of the op amp, and it achieves a phase margin, m , of approximately 45. a higher phase margin can be obtained by increasing the value of cf. setting cf to twice the previous value yields approximately m = 65 and a maximal flat frequency response, but it reduces the maximum signal bandwidth by 50%.
data sheet ada4001- 2 rev. b | page 11 of 12 input bias current because the ada4001 - 2 ha s a jfet input stage, the input bias current, due to the reverse - biased junction, has a leakage current that approximately doubles every 10c. the power dissipation of the part, combined with the thermal resistance of the package, results in the jun ction t emperature increasing 30 c above ambient. this parameter is tested with high speed ate equipment, which does not result in the die temperature reaching equilibrium. this is correlated with bench measurements to match the guaranteed maximum at room temperat ure in table 1 . the input current can be reduced by keeping the temperature as low as possible and using a light load on the output. noise considerations the jfet input stage offers very low input voltage noise and input current noise. the thermal noise of a 1 k ? resistor at room temperature is 4 nv/hz, thus low values of resistance should be used for dc - coupled inverting and noninverting amplifier configurations. in the case of transimpedance amplifiers (tias), current noise is more important. the ada4001 - 2 is an excellent choice for both of these applications. analog devices , inc., offers a wide variety of low voltage noise and low current noise op amps in a variety of processes optimized for different supply volt age ranges. refer to the an - 940 application note for a complete discussion of noise, calculations, and selection tables for more than three dozen low noise, op amp families.
ada4001- 2 data sheet rev. b | page 12 of 12 outline dimensions contr ol ling dimen sions ar e in mi lli met ers ; inc h dim ens i ons (in p are nth eses ) are roun ded -off mill imet er e qui v ale nts for refe renc e onl y and are not app ropr i a te for use in desi gn. com pli ant t o jed ec st and ard s ms- 012 -aa 012 407- a 0.2 5 (0. 009 8) 0.1 7 (0.00 67) 1.27 (0.05 00) 0.4 0 (0. 015 7) 0.5 0 (0.01 96) 0.2 5 (0 .0 09 9) 45 8 0 1 .75 (0.06 88) 1.3 5 (0 .0 53 2) sea ting p lane 0.2 5 (0.00 98) 0.1 0 (0 .0 04 0) 4 1 8 5 5.0 0 (0. 196 8) 4 .80 (0. 189 0) 4.00 (0.15 74) 3. 80 (0 .1 49 7) 1.2 7 (0. 050 0) bsc 6. 20 (0 .2 44 1) 5.80 (0.22 84) 0.5 1 (0. 020 1) 0.3 1 (0. 012 2) cop la narit y 0.10 figure 29 . 8 - lead standard small outline package [soic_n] narrow body (r - 8) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option ada4001 - 2arz ? 40c to +125c 8 - lead soic_ n r -8 ada4001 - 2arz -r7 ? 40c to +125c 8 - lead soic_n r -8 ada4001 - 2arz -rl ? 40c to +125c 8 - lead soic_n r -8 1 z = rohs compliant part. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10375 - 0- 5/12(b)

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